Technical Papers
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CD transport CDT20R / Digital to analogue converter DAC20
This paper describes the techniques and methods which are at the heart of the design philosophy of the F3 Series CD
transport CDT20R and digital to analogue converter DAC20. The paper will illustrate the attention to detail that must
be applied to create a leading edge two box CD player to the very highest standards, both objectively and subjectively.
Introduction
CD has been with us since 1982, when it was first launched, and has found its way into other applications which have
now outgrown the original concept as a digital audio carrier. Whilst CD promised perfect reproduction, due to its
digital nature, it is only in recent years that its full potential has been realised due to technology improvements
and a better understanding of digital audio. TAG McLaren Audio has made use of this increased knowledge and new
technology in the development of their CDT20R Transport and DAC20 DAC.
The following sections discuss some of the issues of the reproduction process, and how they have been handled in the
CDT20R and DAC20.
CD TRANSPORT CDT20R
The CDT20R is a high performance CD transport designed for use with the DAC20 and other outboard Digital to Analogue
Converters. Whilst the product maybe considered purely digital, both analogue and RF circuit techniques are adopted
to achieve the ultimate performance. The following sections describe some of the engineering behind the CDT20R and
the block diagram in figure 1 shows its key components.
The Compact Disc
To understand the advanced technology used in the TAG McLaren Audio CD products, it is best to start by looking at the
engineering problems faced.
The Compact Disc has a spiral track of pits from which the information is read. Unlike an LP, the readout is by means
of an optical, non-contact, process. The pits are about 0.5 µm wide, 700 times smaller than a pin prick, and the pitch
between the tracks is 1.6 µm. The spiral runs from the centre to the outer edge of the disc, with a length of around 5
km (20,188 revolutions). The data is extracted from this spiral using a laser to generate an eye pattern, the reflected
beam is then read by the optical pick up and decoded using a CD decoder.
To generate an eye pattern from which all the data on the disc can be retrieved, the laser spot should follow the centre
of the 0.6 µm wide track to within about ± 0.1 µm, with no interference from adjacent tracks just 1.6 µm away. Since
the track on the disc may be slightly eccentric due to tolerances in the disc pressing equipment, and to handle the
effects of vibration, the control servo should furthermore be able to accommodate a maximum side to side track swing of
about 300 µm. The requirements for the focusing servo are equally severe. For adequate read-out, the focusing servo
has to keep the laser beam focused on the reflecting layer of the disc to within ± 0.5 µm, even with a maximum disc
warp of 1 mm.
These requirements are fully met in the TAG McLaren Audio CD products by using a high quality CD mechanism along with
digital servo control.
CD Mechanism
The CDT20R uses a Philips CDM12.4 mechanism, which is specifically designed for CD-ROM applications where data
integrity is of the utmost importance. The mechanism has the photo diode pre-amplifier and laser supply control
circuit on the flex foil, close to the detectors, to ensure the signals leaving the flex foil have a good signal to
noise ratio. This is in contrast to the CDM12.1, recommended for cost effective solutions, which requires these
components to be mounted on the main PCB, a significant distance away from the detectors.
Servo Control & CD Decoding
Servo control is performed using the OQ8868 digital servo controller from Philips. This part is an improved version of
the TDA1301, offering lower noise in the focus loop, and improved jump performance. The digital servo removes the
need for external trims and does not suffer from changes in component tolerances, thus ensuring consistent performance
at all times. The CD decoding is carried out by an SAA7345, also from Philips. This part performs all the necessary
decoding and makes full use of the CD’s Cross-Interleaved Reed-Solomon Code (CIRC) to both detect and correct errors,
thus ensuring a reliable data stream at the digital outputs.
Data Re-timing
Whilst error free data is essential for accurate audio reproduction, transmission of the data with precisely timed edges
plays an important role too. Any timing errors on the data transitions will compromise the performance of the outboard
DAC, since the DAC uses these transitions for re-generation of the clock. The accuracy is required more so if the DAC
only adopts a single Phase Locked Loop (PLL) for its clock recovery. The IEC958 data leaving the SAA7345 is therefore
re-timed using an accurate re-timing clock.
Re-timing Clock
Data re-timing is performed using a 16.9344 MHz Voltage Control Crystal Oscillator (VCXO) that is phase locked to the
16.9344 MHz clock from the SAA7345. The oscillator is specifically designed for high Q, low noise performance, to
guarantee accurate re-timing of the data transitions. It is located next to the re-timing circuits in order to keep
the re-timing clock track length to a minimum, making it less prone to pick-up. The clock from the SAA7345 is fed to
the PLL via a transmission line to minimise reflections and thus maintain accuracy of the transitions. The bandwidth
of the PLL is set to 160 Hz to ensure jitter components above this frequency are attenuated.
Slew Rate Control
In an ideal world, the data transitions should be as fast as is practically possible in order to reduce the timing
uncertainty associated with the switching threshold of the receiving device. However, in practice there are many other
factors to be considered. One such factor is the need for a controlled impedance link between the two digital devices,
since fast data transitions result in frequency components up into the hundreds of MHz. If there is an impedance
mismatch across the link, then electrical reflections will occur causing signal distortion and inaccurately timed data
edges. The SPDIF interface promotes the use of phono connectors, and there are many digital interconnects available to
support this format, hence the reason why the CDT20R and DAC20 offer such connectors. However, phono connectors do not
have a controlled impedance, thus creating a problem for fast data transitions. BNC connectors on the other hand do,
and are therefore provide on the CDT20R and DAC20 as an alternative, but superior connector, to the phono.
The CDT20R provides slew rate controlled outputs (30 ns rise and fall times) to reduce the high frequency content of
the digital signal, thus ensuring best performance across a range of digital interconnects and connector types (Phono,
BNC, or XLR). The circuits that perform this ensure precisely matched transitions, both positive and negative, to
maintain the timing accuracy achieved by the data re-timing circuit. The slew rate is set by means of a capacitor
which is used to integrate a constant current, thus providing a constant dv/dt.
Single Ended Outputs - SPDIF
Two SPDIF outputs are provided on the CDT20R; one via a BNC connector and the other via a phono connector. Each output
has its own drive circuit, thus allowing both to be used at the same time, if so required. The discrete component
drive stages are AC coupled to the connectors, and are designed to present an accurate 75
W impedance to the outside
world.
Balanced Output - AES/EBU
The balanced output is made available via a male XLR connector. The output is isolated, using a 1:1 transformer, and
presents a balanced impedance of 110
W to the outside world. The drive stage to the transformer is truly differentially,
and uses current steering rather voltage switching to avoid ground bounce. The driver is constructed using discrete
components and incorporates the slew rate control discussed above.
User Interface
The CDT20R has been designed to have a simple, easy to use, minimal key press user interface. The front panel supports
all the basic functions whilst the remote control provides for the less used ones and has a numeric keypad for direct
track selection. Programming, with extensive edit facilities, is also provide to allow a sequence of user selected
tracks to be played.
DIGITAL TO ANALOGUE CONVERTER DAC20
The DAC20 offers both ultimate sound quality and flexibility due to its range of digital inputs and dual, low impedance,
analogue outputs. The following sections describe some of the engineering behind the DAC20, and the block diagram in
figure 2 shows its key components.
Digital Inputs and IEC958 Receiver
The DAC20 provides a range of input types to suit most requirements. SPDIF inputs make use of both Phono and BNC
connectors to allow a wider choice of digital audio interconnects. Optical inputs are included for equipment that only
supports optical outputs, and a balanced AES/EBU input.
The SPDIF inputs are 75
W terminated in compliance with IEC958. For best performance, these inputs should be connected
to 75 W sources via 75 W digital audio interconnects. The input circuits contain hysterisis to minimise noise at the
switching threshold, and input levels should therefore be greater than 200 mV peak to peak for correct operation. The
inputs are also ESD protected, thus limiting the peak to peak input voltage to around 6 V.
The balanced input has a 110
W input termination, and should be driven from a source and cable of the same impedance
for best performance. It is also transformer coupled for increased isolation, thus allowing for differences in ground
potential when being driven from a remote piece of equipment via a long cable. The input signal should be greater than
200 mV peak to peak, but less than 6 V peak to peak, for correct operation. The nominal driving level is around 3 V
peak to peak.
The optical inputs are EIAJ compatible TOSLINK devices - TORX176. These have faster switching times and better skew
performance than the earlier TORX174. Optical connections have the advantage of total galvanic isolation between the
source and DAC20, but tend to be inferior to their electrical alternatives due to the limited bandwidth of the optical
devices.
The IEC958 data stream, whether from an electrical or optical source, is converted to clock and data by the CS8412
digital audio receiver from Crystal Semiconductor. This part incorporates a low noise VCO in order to keep jitter to
a minimum. The internal PLL, of which it is part, has a closed loop bandwidth of around 25 kHz. The receiver also
accepts word lengths up to 24-bits, making the DAC20 ideal for use with outboard processors.
Oversampling & Digital Filtering
Oversampling is a process used extensively in digital to analogue conversion for two main reasons; a simplified
analogue reconstruction filter and the ability to reduce word lengths without loss of information. The later of these
benefits was made use of in early CD players to achieve the 16-bit resolution from CDs using only 14-bit DACs available
at that time. Oversampling relies on the fact that the round-off mechanism used spreads the distortion products due to
truncation over the entire oversampling spectrum. The result is that the distortion in the baseband is only a fraction
of the total. The term oversampling simply means increasing the sampling rate, and nothing more.
The second advantage of oversampling is that lower order analogue reconstruction filters can be used on the output of
the DAC (see figure 3). This has the benefit that the analogue filter can be designed to have a constant group delay
(linear phase) over the baseband, which is essential for accurate reconstruction of the original signal. Since the
analogue filter has little effect in the baseband region, component variations due to temperature, and over time, do
no alter the audio performance.
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Figure 3
Oversampling makes use of interpolation to create the extra samples. However, interpolation alone between two
consecutive samples is not sufficient to attenuate the sampled images at FS through to 7 x FS, hence the reason for
digital filtering. The digital filter makes use of many more samples to perform the interpolation, the more samples
it can use, the better the interpolation and attenuation of the sampled images. The attenuation of these images is
very important for high performance audio reproduction. This is why the DAC20 uses a PMD100 eight times oversampling
filter which offers outstanding performance in terms of its passband ripple (< 0.0001 dB) and stopband attenuation
(> 120 dB). The filter also has the ability to decode HDCD encoded CDs, thus allowing the full benefit of increased
dynamic range offered by these CDs to be enjoyed.
HDCD
HDCD is an encoding and decoding process developed by Pacific Microsonics to provide increased amplitude resolution and
to correct for sampling rate limitations. It is compatible with the CD "Red Book" standard, thus allowing encoded CDs
to be played on equipment not containing HDCD decoding, but still offering some of the benefits of improved fidelity.
However, for the full benefits of HDCD, the use of a decoder is essential. This is another reason why the DAC20 uses
the PMD100 digital filter which contains HDCD decoding. The DAC20 will therefore allow the full performance of the
growing number of HDCD encoded CDs to be enjoyed.
HDCD encoded CDs contain a hidden code that is detected by the PMD100 for automatically switching in the decoder.
Since this process is automatic, there are no controls for HDCD on the front of the DAC20, but there is an indicator
to show when HDCD material is being decoded.
The peak output level from the DAC20 is 6 dB higher for HDCD encoded CDs. This is due to the increased dynamic range
offered by HDCD.
Digital to Analogue Conversion
The Digital to Analogue converter stage is constructed around the SAA7350 and TDA1547 from Philips. The SAA7350 is
used to up sample and noise shape the digital audio data stream, producing a 1-bit Pulse Density Modulated (PDM) output
signal for conversion back to analogue by the 1-bit DAC. It takes in data from the digital filter at 8 x FS, and then
outputs it at 192 x FS. This oversampled data stream is then carefully routed to the TDA1547 1-bit DAC. The clock for
the DAC is taken directly from the clean master clock, which is again carefully routed away from digital audio data
tracks.
The layout of the Digital to Analogue Converter stage is as important as the design itself, due to the high frequency
content of both data and clock. Special RF layout techniques are used to maintain converter accuracy and achieve
optimum performance. The attention to detail also ensures that the full benefits of single bit DAC are obtained.
The voltage reference to the 1-bit DAC is derived from a forward biased LED. This produces significantly less noise
than a standard voltage reference diode which relies upon reverse bias breakdown. The reference voltage from the LED
is buffered and heavily filtered to provide a low impedance drive across a wide frequency range, up into the MHz region.
This again is essential for accurate conversion.
Noise Shaping and 1-Bit DAC
The process of oversampling and how it can be used to reduce the word length has been described briefly. For each
doubling of the sampling frequency, one bit can be dropped from the word length. If this process is taken far enough
the word length can be reduced to a single bit and a 1-bit DAC can be used to convert the samples back into analogue.
Unfortunately, to reduce a 16-bit word down using this process would require an oversampling rate up in the GHz region.
Since this is totally impractical, a compromise is made and a process called noise-shaping is used to get down to a
single bit at sensible oversampling rates. Present noise shapers run at rates from 64 x up to 192 x FS. The higher
the sampling rate the better, for obvious reasons. This is why the DAC20 uses an SAA7350 which runs at 192 x FS.
Noise-shaping is used to reduce the noise in the baseband, which has resulted from the inability to oversample at a
high enough rate, by moving it up to frequencies outside of the baseband. The SAA7350 uses 3rd order noise-shaping to
achieve this objective. The noise shaped 1-bit waveform is processed in the DAC20 by the TDA1547 1-bit DAC. This part
has been chosen for its excellent performance and linearity.
Prerequisites for Accurate Digital to Analogue Conversion
In order for the original signal to be reproduced accurately from the digital data, it is essential that the data is
error free and the clock used for the conversion process is precisely timed. Clock purity is a particular area where
great attention to detail is paid in all TAG McLaren Audio digital audio products. It ensures that the reproduced
audio is precise in every detail, making the experience life-like.
It is well known that the digital audio interface has its limitations, and that it is the main jitter contributor in
outboard DACs. The reason for this is that the recovered clock, extracted from the data stream using a phase locked
loop (PLL), tends to be modulated by the digital audio data samples. One would argue that if this is the case, then
single box CD players must be better. This would certainly be true if nothing was done to remove the jitter from the
clock.
Jitter and Jitter Reduction
The term timing jitter is loosely used to describe timing errors associated with digital signal transitions relative to
their ideal positions. For clocks, timing jitter can be considered as a type of phase or frequency modulation. The
clock recovered from the incoming data stream tends to be modulated by the data, an inherent weakness of the AES/EBU
and SPDIF interface. This correlated modulation also tends to be worse for low level audio signals, where all the
data bits tend to be changing from all ones to all zeros and vice versa.
The DAC20 contains three PLLs for clock recovery, although generally, we only talk about two. The first, which is part
of the digital audio receiver (CS8412), has a high gain VCO and a fairly wide closed loop bandwidth. The wide
bandwidth is essential for correct operation of the receiver, but does not provide for good jitter rejection. The
second PLL has a lower closed loop bandwidth and performs a given amount of jitter rejection, whilst at the same time
up-converting the 256 x FS clock to 384 x FS. The clock from this PLL is used for data conversion when the Master
Clock PLL cannot lock. The third PLL, which generates the Master Clock, is where the ultimate clock performance is
achieved using Voltage Controlled Crystal Oscillators.
Master Clock PLL
The DAC20 is designed for optimum performance at each of the three standard sampling rates; 32, 44.1, and 48 kHz. At
these sampling rates the DAC20 will operate in crystal lock mode using the Master Clock PLL.
The block diagram, in figure 4, shows the basic construction of the master clock phase locked loop. Whilst the diagram
only shows one crystal oscillator, there are in fact three, one for each of the sampling frequencies. The oscillators
run at 384 x the nominal sampling rates. Only one oscillator is enabled at any one time to avoid problems of
inter-modulation. The loop comprises of a comparator, loop filter, voltage controlled crystal oscillator, and divider.
Although not shown in the diagram, the divider has in fact tap positions for other multiples of the basic FS sampling
rate.
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Figure 4
The crystal oscillators are designed to have pulling ranges of around ± 150 ppm, and can be locked to digital sources
whose oscillators are in error by up to ± 100 ppm. It should be noted that all high quality digital audio sources will
be well within these limits. A key feature of the oscillators is their low noise, which is essential for minimum jitter.
The loop filter has been designed for a 3 dB closed loop bandwidth of around 12 Hz to ensure that jitter above this
frequency is attenuated. The loop bandwidth also determines the lock time, and is the reason why the DAC20 can take up
to half a second for its oscillators to lock.
The performance of the loop can easily be seen by comparing the CS4812 256 x FS clock to the 384 x FS master clock using
an RF spectrum analyser (see plots in figures 5 and 6). The audio test signal used for the comparison was a - 90 dB
full scale 500 Hz sinewave with no dither. This was chosen because it is the lower level signals that produce most
jitter on the digital interface and most test CDs contain this signal with and without dither. The reason for lower
level signals being worse is that the majority of the bits in each audio sample are changing between all ones and all
zeros.
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Figure 5 - CS4812 256 x FS Clock

Figure 6 - 384 x FS Master Clock
Analogue Reconstruction Filters
The DAC20 uses reconstruction filters to remove the high frequency digital images. Whilst these images are outside of
the human hearing frequency range, and thus cannot be heard, it is still essential that they are removed. This is
because other equipment in the audio path (preamplifier and power amplifier) could, by means of inter-modulation,
introduce spurious signals into the baseband, thus ruining the reproduction.
The filters are a five pole design offering good attenuation in the stopband whilst maintaining a constant group delay
(linear phase) in the passband. The first stage makes use of OPA627s from Burr Brown, whilst the remaining stages make
use of OPA134s, also from Burr Brown. High accuracy, low temperature coefficient, Vishay metal film resistors are
also used, along with Wima FKP2 (polypropylene) capacitors. These components ensure both accurate filtering
characteristics and audiophile performance.
The output stage is direct coupled, using a servo to remove DC offsets. The servo provides a low frequency break
point of around 0.1Hz, which is essential for maintaining the phase information of transient signals. The servo
amplifier is an OPA627, the same as is used in the first stage of the filter.
The final output stage provides a low impedance (100R) drive to the phono output sockets, thus allowing long cable
lengths to be driven. The outputs are also stable for all capacitive loads, making them suitable for use with all
types of audiophile interconnects.
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